Kmeaw PS3 LV2 Patcher v8 Arrives, Syscall36 {Support|Help|Assistance} and {More|Much more|A lot more|Far more}
{Today|These days|Right now|Nowadays} kmeaw has updated his PS3 LV2 patcher to version {8|eight}, which {includes|consists of|contains} {support|help|assistance} for the Syscall36 payload alongside Waninkoko V2 PlayStation {3|three} Custom Firmware.
To quote: New update has arrived to the {popular|well-liked|common|well-known} Kmeaw LV2 patcher now with e pport of Syscl and Waninkoko V2 CFW. The version is {still|nonetheless} the {same|exact same|identical|very same} though as according to Kmeaw himself, no code has been changed.
kmeaw: yes
kmeaw: c540c141fb5d9f5723ba6c394c5e9828
kmeaw: i have added sc36 payload
kmeaw: it is {still|nonetheless} v8
kmeaw: no code has been changed
kmeaw: just new txt and .bin files
lv2patcher : Dukio, sorry, I have updated the lv2patcher {again|once more|once again} icon smile Kmeaw LV2 Patcher V8 *Updated* Syscall 36 Payload, Waninkoko V2 CFW {Support|Help|Assistance} The {difference|distinction} is minor %u2013 I have added a delay into gamepad reading loop which fixes accidental skipping {while|although|whilst|even though} the user is {selecting|choosing} the patchset.
In {related|associated|connected} PS3 homebrew news {today|these days|right now|nowadays} rms has {made|produced|created} {available|obtainable|accessible|offered} NOR UnPKG.
Finally, Mathieulh shared a theory on how to unlock the 8th PlayStation {3|three} SPU, as follows: I just figured how to unlock the {extra|additional|added} spu which sony has disabled at factory. Upon startup, the syonirmware willeathe eeprom {value|worth} {located|situated} at 0x48C30 and will set the cell config ring accordingly. That {value|worth} is set to 0×06 on all {consumer|client} consoles which {means|indicates|signifies|implies} 7 SPEs are {actually|really|truly|in fact} enabled. Incrementing it {should|ought to|need to|really should} unlock the {extra|additional|added} SPE. btw by EEPROM I {obviously|clearly} {mean|imply} Syscon’s EEPROM. You can {read|study}/write to that offset {through|via|by means of|by way of} the Update Manager.
Mathieulh: http://twitter.com/#!/Mathieulh/status/33274848042033152
Mathieulh: http://twitter.com/#!/Mathieulh/status/33275753294462976
Mathieulh: http://twitter.com/#!/Mathieulh/status/33275984421593088
Mathieulh: http://twitter.com/#!/Mathieulh/status/33278019523055616
Luzifer42: *{should|ought to|need to|really should}* unlock the {extra|additional|added} SPE. Did you test it?
Mathieulh: no, I am not too keen on bricking
Mathieulh: but that’s the {right|correct|proper|appropriate} offset
CsakEn: why was that spu disabled anyway?
Mathieulh: yield improvements
Mathieulh: the {problem|issue|dilemma|difficulty} is I dunno what will {happen|occur|take place|come about} if I do {enable|allow} it and that the spu is defective
Mathieulh: or if there are {extra|additional|added} checks to make {sure|certain|positive|confident} that spu isn’t enabled later on in the bootchain
Luzifer42: i am {surprised|shocked} that the spu is not disabled with a fuse
Mathieulh: Luzifer42 {it’s|it’s|it is} disabled {using|utilizing|making use of|employing} the config ring which syscon sends to the cell at startup
Mathieulh: in {fact|reality|truth} you can enabled it {another|an additional|yet another|one more} way
Mathieulh: you have to highjack the spi bus
Mathieulh: and {change|alter} the config ring on the fly as {it’s|it’s|it is} sent to the cell processor
Mathieulh: and then you can {enable|allow}/disable any SPE you like
Mathieulh: geohot {actually|really|truly|in fact} did that
Mathieulh: but {it’s|it’s|it is} messy and {needs|requirements|wants|desires} {extra|additional|added} hardware and soldering
Mathieulh: and {it’s|it’s|it is} not sony’s way
Pockets69: disabling just {one|1} meaning we will have 6 wouldn’t it {work|function|operate} just for testing?
Mathieulh: Pockets69 not if you have a sanity {check|verify} that {ensures|guarantees|assures} at least 7 spes are {available|obtainable|accessible|offered}
Mathieulh: also I am {quite|fairly|very|really} {sure|certain|positive|confident} that if you disable either SPE0 or SPE2, you brick
Mathieulh: {cause|trigger} they are {used|utilized|employed|utilised} for isolation by respectively the bl and metldr
Pockets69: any {idea|concept|thought|notion} {where|exactly where} the {check|verify} {might|may|may well|may possibly} be?
Mathieulh: Pockets69 {well|nicely|properly|effectively} in theory you can set any given {value|worth} from 0×00 to 0×07 and the config ring will be changed and the cell will only {start|begin|commence} with the given {number|quantity|amount} of SPEs but then you {might|may|may well|may possibly} mess up the bootchain 
Mathieulh: and if you can’t boot {again|once more|once again}, you can’t write to the eeprom {anymore|any longer}
Mathieulh: (0×00 is {actually|really|truly|in fact} an SPE as {well|nicely|properly|effectively})
Mathieulh: I assume there is some internal config in the cell
Mathieulh: which attributes a {specific|particular|certain|distinct} id
Mathieulh: to a SPE
Mathieulh: and which is set at factory
Mathieulh: so the defective SPE
Mathieulh: will {always|usually|often|constantly} be given SPE7
Mathieulh: in {fact|reality|truth} it can’t be “random” {cause|trigger} the bl {always|usually|often|constantly} loads at SPE0
Mathieulh: so does the cell bootrom
Mathieulh: and metldr {always|usually|often|constantly} loads at SPE2Mathieulh:rong> the BL is ally supposed to lot some random SPE
Mathieulh: but for some unknown {reason|cause}
Mathieulh: it doesn’t
Mathieulh: SPE0 isn’t supposedly the {first|initial|1st|very first} physical SPE to be {used|utilized|employed|utilised}
Mathieulh: and {each|every|every single|each and every} SPE is attributed a {certain|particular|specific} id at factory
Mathieulh: the defective {one|1} {should|ought to|need to|really should} {always|usually|often|constantly} be 7
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